Define the following terms: (1) Buffer Register (2) Flip flop (3) Counter
[3 marks]Explain S-R Latch.
[4 marks]Perform the subtraction with the following decimal numbers (a) 14 from 25 using 8bit 1’s compliment (b) 14 from 46 using 8 bit 2’s compliments.
[7 marks]How does a counter work as frequency divider? Explain with suitable example
[3 marks]Explain Johnson counter.
[4 marks]Compare ROM, PLA and PAL.
[7 marks]Write short note on Programmable Logic Arrays.
[7 marks]Show that AB+AB’C+BC’ = AC+BC’
[3 marks]Discuss NAND gate as universal gate (implement NOT, AND, OR & NOR gate using NAND gate)
[4 marks]Reduce using mapping the Expression ∑m (0, 1, 2, 3,5,7,8,9,10,12,13) and implement it in universal logic.
[7 marks]Convert the following to other canonical form F( x,y,z) = Σ( 1,3,7)
[3 marks]Convert the following expression into sum of products and products of sums: (BC + D)(C + AD’)
[4 marks]State and prove De’Morgan’s Theorems with the help of truth tables.
[7 marks]Give the applications of Decoder.
[3 marks]Implement the given function using multiplexer F(w, x, y, z) = ∏(3, 10, 11)
[4 marks]Implement following logic function using 8X1 MUX. P = Σ m(1, 2, 6, 7, 8, 10, 13, 14)
[7 marks]Explain the working of multiplexer
[3 marks]Design 4 X 16 decoder using two 3 X 8 decoder.
[4 marks]Design a 8 to 1 multiplexer by using the four variable function given by F(A,B,C,D) =Σm(0,1,3,4,8,9,15).
[7 marks]Draw and explain Ring counter in brief.
[3 marks]What is race around condition in JK flip flop.
[4 marks]With logic circuit explain the working of 4-bit magnitude comparator.
[7 marks]Explain shift registers.
[3 marks]Draw & explain in brief a high assertion input SR latch.
[4 marks]Explain half and full adders in detail.
[7 marks]