Define the following terms: (1) Flip flop (2) Counter (3) Register
[3 marks]Implement Tflip flop using Dflip flop.
[4 marks]Perform the subtraction with the following decimal numbers using 1’s compliment and 2’s compliments. (a) 11010-1101, (b) 10010-10011
[7 marks]How does a counter work as frequency divider? Explain with suitable example
[3 marks]Draw and explain Ring counter
[4 marks]Write short note on Programmable Logic Arrays.
[7 marks]Reduce the expression F = ((AB)’+A’+AB)’
[3 marks]Convert F (A, B, C) = BC +Ainto standard minterm form.
[4 marks]Minimise the logic function F (A,B,C,D) = Π_ M (1, 2, 3, 8, 9, 10, 11,14) · d (7, 15) Use Karnaugh map. Draw the logic circuit for the simplified function using NOR gates only.
[7 marks]Convert the following to other canonical form F( x,y,z) = Σ( 1,3,7)
[3 marks]Discuss NAND gate as universal gate (implement NOT, AND, OR & NOR gate using NAND gate)
[4 marks]State and prove De’Morgan’s Theorems with the help of truth tables.
[7 marks]Give the applications of Decoder.
[3 marks]Implement the given function using multiplexer F(A,B,C) = Ʃm(1,2,4,7)
[4 marks]Implement following logic function using 8X1 MUX. F = Σ m(0, 1, 3, 5, 7, 11, 13, 14, 15)
[7 marks]Explain the working of multiplexer
[3 marks]Design 4 X 16 decoder using two 3 X 8 decoder.
[4 marks]Design a 8 to 1 multiplexer by using the four variable function given by F(A,B,C,D) =Σm(0,1,3,4,8,9,15).
[7 marks]Explain Johnson counter.
[3 marks]Draw & explain in brief a high assertion input SR latch.
[4 marks]With logic circuit explain the working of 4-bit magnitude comparator.
[7 marks]Explain shift registers.
[3 marks]What is race around condition in JK flip flop.
[4 marks]Explain half and full adders in detail.
[7 marks]