State and explain De-Morgan’s theorems.
[3 marks]Explain the Combination Clipper Circuits with example.
[4 marks]Explain with neat diagram Voltage Divider Bias.
[7 marks]Implement Full Adder using 3 to 8 Decoder.
[3 marks]Design 3- bit up synchronous counter.
[4 marks]Compare in detail RTL, DTL, TTL, ECL and CMOS.
[7 marks]Show that NAND and NOR are universal gate.
[7 marks]Explain the load line for diode.
[3 marks]Explain the Positive Biased Clipper Circuit with output waveform.
[4 marks]Make a Half and full wave Voltage Doubler Circuits and explain.
[7 marks]Define: (1) DC Resistance of diode, (2) Bulk Resistance and (3) PIV.
[3 marks]Explain the Capacitor input filter with half-wave rectifier.
[4 marks]Draw and Explain the working of clocked RS flip-flop.
[7 marks]Explain the ripple counter.
[3 marks]Draw the logic diagram and state truth table of 4x1 multiplexer.
[4 marks]Explain Master Slave J-K Flip Flop. List the advantages of edge triggered07 flip flops.
[ marks]Comparison between 1’s and 2’s compliments.
[3 marks]Explain in detail bidirectional shift register with parallel load.
[4 marks]Explain the operation of different types of shift registers.
[7 marks]Explain the Negative Clamper circuit.
[3 marks]Write the difference between Half wave and Full wave Rectifier.
[4 marks]Drive the equation of I , V , I , V , Ripple Factor () and PIV for DC DC RMS RMS Half-Wave rectifier.
[7 marks]What are the factors affecting the stability of Q Points.
[3 marks]Comparison of Piecewise liner equivalent circuit, Constant Voltage Drop04 circuit and Ideal equivalent circuit for diode.
[ marks]Explain the output Characteristics of CE Configuration for transistor with07 neat sketch. Also indicate different regions and explain.
[ marks]