State and Apply DeMorgan’s theorem.: [(x+y)’+(x+y)’]’=x+y
[3 marks]Do As Directed: 1. Convert (0.6875) to Binary.10 2. Give the octal equivalent of hexadecimal numbers of DC.BA. 3. Convert (101101.1101) to Hexadecimal.2 4. Give the Truth Table of XOR gate.
[4 marks]Prove that NAND and NOR gates are universal gates.
[7 marks]Determine the value of base x if (211) = (152) x
[8 marks]Subtract (111001) from (101011) using 1’s complement22
[4 marks]Simplify and implementation the following SOP function using NOR gates F(A,B,C,D)= ∑m(0,1,4,5,10,11,14,15)
[7 marks]Simplify the Boolean expression using K-map and implement using NAND gates F(A,B,C,D) = ∑m(0,2,3,8,10,11,12,14)
[7 marks]Design the combinational circuit of 4 Bit Parallel Adder.
[3 marks]Implement the following Boolean function using 8:1 multiplexer: F(A, B, C, D) = A’BD’ + ACD + A’C’ D +B’CD
[4 marks]Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate the 9’s complement of the input digit.
[7 marks]Design Truth table for the Half adder and write the expression for the sum and carry.
[3 marks]Implement the following Boolean function using 8:1 multiplexer: F(A,B,C,D) = Σm (0,3,4,7,8,9,13,14)
[4 marks]Design 5 to 32 line decoder using 3 to 8 line decoder and 2 to 4 line decoder.
[7 marks]Explain about Ring counter.
[3 marks]Describe how Tflip-flop is converted into Dflip-flop.
[4 marks]What is the function of shift register? With the help of simple diagram explain its working.
[7 marks]Explain various applications of the register.
[3 marks]Describe how JK flip-flop is converted into Dflip-flop.
[4 marks]Draw the state diagram of BCD ripple counter, develop its logic diagram and explain its operation.1
[7 marks]Write difference between PROM, PLA & PAL.
[3 marks]Using 8x4 ROM, realize the expressions W(A,B,C) =∑m(0,1,3,5,7) ,X(A,B,C) =∑m(0,2,4,5) , Y(A,B,C) =∑m(1,2,4,7) , Z(A,B,C=∑m(0,3,5,6,7). Show the data at address 2 & 6.
[4 marks]Implement the following function using PLA F1= ∑m(0,2,5,8,9,11),F2=∑m(1,3,8,10,13,15),F3=∑m(0,1,5,7,9,12,14).
[7 marks]Discuss : Field Programmable Gate Array (FPGA)
[3 marks]Explain Successive Approximation type A/Dconverter.
[4 marks]Give a brief on various types of memories.
[7 marks]