Present device isolation techniques in fabrication process.
[3 marks]Explain the MOS system under external bias.
[4 marks]Describe the working of edge-triggered flip-flops with necessary diagrams.
[7 marks]Explain the basic principles of pass transistor circuits.
[3 marks]Design 2-input OR, AND and XOR gate using CMOS.
[4 marks]Present the analysis of the resistive load inverter. Derive critical voltages and noise margins.
[7 marks]Analyze transmission gates (TGs) in detail. Also, describe the procedure for circuit design with TGs.
[7 marks]Enlist MOSFET scaling and small-geometry effects.
[3 marks]Discuss synchronous dynamic circuit techniques.
[4 marks]Present timing analysis of CMOS inverter.
[7 marks]What is the built-in self-test (BIST)? Explain this technique in brief.
[3 marks]Describe the behavior of bistable elements.
[4 marks]Explain voltage bootstrapping.
[7 marks]Write the equations describing the current-voltage characteristics of MOSFET.
[3 marks]Describe fabrication of nMOS Transistor.
[4 marks]Analyze the factors behind latch-up problems. Also, explain the techniques for its prevention.
[7 marks]What is the substrate bias effect? Explain its analysis.
[3 marks]Discuss switching power dissipation of CMOS inverters.
[4 marks]Present the analysis of on-chip clock generation and distribution techniques.
[7 marks]Define and explain DIBL.
[3 marks]Present delay-time definitions.
[4 marks]Discuss fault types and models.
[7 marks]Explain controllability and observability.
[3 marks]Describe the operating principle of the SR latch circuit with the necessary diagrams.
[4 marks]What are the needs of FinFET devices? Explain FinFET devices in detail. Also, compare them with planar MOSFET.
[7 marks]