Testing and Verification — Winter 2022

Differentiate following terms: Testing and Verification

Define following: 1. Yield, 2. Reject rate, 3. Online testing, 4. Fault detection efficiency.

Consider the combinational logic circuit in Figure. How many possible single stuck-at faults does this circuit have? How many collapsed single stuck at faults does this circuit have? Determine input test vectors that can detect all single stuck-at fault. a b d g i e f h c

Define mean time between failure, mean time to repair and system availability.

What is Fault modelling and its requirement? List different fault models.

Discuss all the possible transistor faults in two-input CMOS NOR gate and the method of testing each of them.

Explain all possible bridging fault models with circuit diagram and truth table.

What is need of DFT techniques and Define following terms: (i) Controllability (ii) Observability

What do you mean by testability? Also explain the meaning of testability analysis.

Write SCOAP combination controllability and observability calculation rule of different logic gates. Find combination controllability and observability of 1 bit full adder using SCOAP technique.

Compare Muxed D , Cloked and LSSD scan cells

Write probability based controllability and observability calculation rules of different logic gates.

Draw and explain scan design flow.1

Enlist various algorithms for fault simulation

Discuss the Transport Delay, Inertial Delay, wire delay and functional element delay in brief.

Explain serial fault simulation algorithm with an example.

What is reconvergence model in verification?

What is Linting tools and its limitations?

What are the different function verification approaches and explain each in details with its advantages and disadvantages.

What is assertion and its importance in verification?

What is importance and role of verification plan?

Draw and explain Enhanced Scan Architecture.

Draw flow chart of logic simulation for design verification.

Explain scan design rule for Derived clock design style and give recommended solution

Explain compile code simulation techniques in detail.